Electronic systems are used in numerous devices including Personal Computers (PC), servers, routers, hubs, switches, line cards, cellular telephones, Personal Data Assistants (PDA), electronic gaming devices, High Definition Televisions (HDTV), as well as industrial devices, automotive devices, and others. The primary technology drivers for these electronic systems are digital logic and control, semiconductor memory, Input/Output (I/O) and mixed signal (analog and digital) technologies. Examples of stand alone products include micro processors/controllers, Dynamic Random Access Memory (DRAM), SRAM, flash EEPROM, A/D converters etc. Examples of embedded products include multiple integrated circuits (IC) as SIC (System-In-Chip) or monolithic IC as SOC (System-On-Chip).
For well over three decades, semiconductor memories such as DRAM's, SRAM's, ROM's, EPROM's, EEPROM's, Flash EEPROM's, Ferroelectric RAM's, MAGRAM's and others, have played a vital role in many electronic systems. Their functions for data storage, code (instruction) storage, and data retrieval/access (Read/Write) continue to span a wide variety of applications. Usage of these memories in both stand alone/discrete memory product forms, as well as embedded forms such as, for example, memory integrated with other functions like logic, in a module or monolithic IC, continues to grow. Cost, operating power, bandwidth, latency, ease of use, the ability to support broad applications (balanced vs. imbalanced accesses), and nonvolatility are all desirable attributes in a wide range of applications.
With low voltage and battery operation becoming mandatory for portability, significant strides have yet to be made towards reducing I/O power consumption. Unlike sophisticated work stations, a portable electronic device usually only has one or two processing units on a chip with one or two memory components. Under such situation, toggling the input/output (I/O) values takes 30%-50% of the total power consumption of the chip.
In commercially available memory devices, the system toggles each bit inputted or outputted in each input/output (I/O) cycle to I/O terminals of the memory devices. This means the dynamic power consumed during each I/O cycle is relatively constant during each I/O cycle with all else being the same in terms of device operation and the number of I/O terminals heavily affects the dynamic I/O power consumption. In U.S. Pat. No. 6,999,352 “Data Inversion Circuit and Semiconductor Device” dated Feb. 14, 2006 issued to Yoshida et al., a data inversion method to save I/O dynamic power is disclosed. This method is for reading operation. The current data to be outputted in a current cycle and the previously outputted data from a previous cycle are compared. If the majority of data bits (N/2 or more of N bits) are to be changed, then the data bits of the current cycle will be inverted to output the resulting data bits, such as to reduce the number of bits of data actually changed on the external bus (to N/2 bits or less), thereby reducing the noise and power consumption. An inversion bit is also set indicating that the data has been inverted. However, there is no teaching or suggestion within Yoshida for solutions with regards to writing operations, nor is there a teaching or suggestion within Yoshida with regard to saving power while inputting address values. Also, the method of Yoshida does not teach or suggest solutions for saving power when a minority number (less than N/2) of the data bits are to be changed.